1. Field of the Invention
The present invention relates to a test apparatus for testing a device-under-test such as a semiconductor device and to a program for functioning the test apparatus.
2. Related Art
Conventionally, a semiconductor test apparatus has used to logically compare an output of a memory-under-test with an expected value per test cycle and to detect Pass when they coincide and Fail when they are inconsistent as a result of the comparison. Therefore, the test apparatus has used to detect that the memory-under-test is defective if it detects Fail even once in the test of the memory-under-test such as a flash memory that is configured so that stored data is read in unit of page across a plurality of cycles and an error correcting code is added in unit of page.
Such flash memory sometimes causes non-permanent software errors by causing a program disturbing mode and by rewriting data in a storage cell other than that to be written. For occurrence of such error, see ‘Large Capacity NAND Flash Memory Technology for Silicon Movie Era’ written by Yasushi Sakuta, FED Journal, Vol. 11, No. 3, 2000, pp. 76-88. When such software error occurs in actual use conditions, a memory controller for controlling the flash memory corrects the error of the data read out of the flash memory.
The conventional semiconductor memory test apparatus detects a failure of the memory-under-test when it detects Fail in either test cycle. Accordingly, there is a case when the test apparatus detects the failure of the flash memory even when a range of errors that can be corrected by the error correcting code occurs in the flash memory.
Still more, depending on a flash memory to be tested, some are apt to cause errors by the software error as described above and some cause no error even one bit. Therefore, there is a need for classifying normally operable flash memories corresponding to a degree of hardly causing any error in order to decide its use and sales price for example.
Accordingly, it is an object of the invention to provide a test apparatus and a program that are capable of solving the above-mentioned problems. This object may be achieved through the combination of features described in independent claims of the invention. Dependent claims thereof specify preferable embodiments of the invention.